Improving CEMA using Correlation Optimization

Authors

  • Pieter Robyns Hasselt University - tUL, Expertise centre for Digital Media, Martelarenlaan 42, 3500 Hasselt
  • Peter Quax Hasselt University - tUL - Flanders Make, Expertise centre for Digital Media, Martelarenlaan 42, 3500 Hasselt
  • Wim Lamotte Hasselt University - tUL, Expertise centre for Digital Media, Martelarenlaan 42, 3500 Hasselt

DOI:

https://doi.org/10.13154/tches.v2019.i1.1-24

Keywords:

Correlation Optimization, Software Defined Radio, Correlation Electromagnetic, Analysis, correlation loss, machine learning

Abstract

Sensitive cryptographic information, e.g. AES secret keys, can be extracted from the electromagnetic (EM) leakages unintentionally emitted by a device using techniques such as Correlation Electromagnetic Analysis (CEMA). In this paper, we introduce Correlation Optimization (CO), a novel approach that improves CEMA attacks by formulating the selection of useful EM leakage samples in a trace as a machine learning optimization problem. To this end, we propose the correlation loss function, which aims to maximize the Pearson correlation between a set of EM traces and the true AES key during training. We show that CO works with high-dimensional and noisy traces, regardless of time-domain trace alignment and without requiring prior knowledge of the power consumption characteristics of the cryptographic hardware. We evaluate our approach using the ASCAD benchmark dataset and a custom dataset of EM leakages from an Arduino Duemilanove, captured with a USRP B200 SDR. Our results indicate that the masked AES implementation used in all three ASCAD datasets can be broken with a shallow Multilayer Perceptron model, whilst requiring only 1,000 test traces on average. A similar methodology was employed to break the unprotected AES implementation from our custom dataset, using 22,000 unaligned and unfiltered test traces.

Published

2018-11-09

Issue

Section

Articles

How to Cite

Improving CEMA using Correlation Optimization. (2018). IACR Transactions on Cryptographic Hardware and Embedded Systems, 2019(1), 1-24. https://doi.org/10.13154/tches.v2019.i1.1-24