The Hidden Parallelepiped Is Back Again: Power Analysis Attacks on Falcon

Authors

  • Morgane Guerreau ANSSI, Paris, France
  • Ange Martinelli ANSSI, Paris, France
  • Thomas Ricosset Thales, Gennevilliers, France
  • Mélissa Rossi ANSSI, Paris, France

DOI:

https://doi.org/10.46586/tches.v2022.i3.141-164

Keywords:

Power Analysis, Lattices, Falcon Signature Scheme, Hidden Parallelepiped Attack

Abstract

FALCON is a very efficient and compact lattice-based signature finalist of the NIST’s Post-Quantum standardization campaign. This work assesses Falcon’s sidechannel resistance by analyzing two vulnerabilities, namely the pre-image computation and the trapdoor sampling. The first attack is an improvement of Karabulut and Aysu (DAC 2021). It overcomes several difficulties inherent to the structure of the stored key like the Fourier representation and directly recovers the key with a limited number of traces and a reduced complexity. The main part of this paper is dedicated to our second attack: we show that a simple power analysis during the signature execution could provide the exact value of the output of a subroutine called the base sampler. This intermediate value does not directly lead to the secret and we had to
adapt the so-called hidden parallelepiped attack initially introduced by Nguyen and Regev in Eurocrypt 2006 and reused by Ducas and Nguyen in Asiacrypt 2012. We extensively quantify the resources for our attacks and experimentally demonstrate them with FALCON’s reference implementation on the ELMO simulator (McCann, Oswald and Whitnall USENIX 2017) and on a ChipWhisperer Lite with STM32F3 target (ARM Cortex M4).
These new attacks highlight the need for side-channel protection for one of the three finalists of NIST’s standardization campaign by pointing out the vulnerable parts and quantifying the resources of the attacks.

Downloads

Published

2022-06-08

Issue

Section

Articles

How to Cite

The Hidden Parallelepiped Is Back Again: Power Analysis Attacks on Falcon. (2022). IACR Transactions on Cryptographic Hardware and Embedded Systems, 2022(3), 141-164. https://doi.org/10.46586/tches.v2022.i3.141-164